Operators:

An operator is a symbol that tells the compiler to perform specific mathematical or logical functions. Verilog provides the following types of operators:

• Arithmetic
• Logical
• Relational
• Equality
• Bit wise
• Reduction
• Shift
• Concatenation
• Conditional
• Replication

Arithmetic Operators:

• +, -, *, /, %, **
• +, -, *, /, % are synthesize able
• ** non synthesize able
• Integer division truncates any fractional part
• The modulus operator is not allowed for real data type variables. 
• The result of a modulus operation takes the sign of the first operand.
• For unsigned arithmetic operations use reg and wire, real and integer for signed arithmetic. 
• If any bit of operand is x, then the entire result is x.

Examples:

1) 13 % 3 // Evaluates to 1

  16 % 4 // Evaluates to 0

  -7 % 2 // Evaluates to -1, takes sign of the first operand

  7 % -2 // Evaluates to +1, takes sign of the first operand 

2) in1 = 4'b101x;

    in2 = 4'b1010;

    sum = in1 + in2; // sum will be evaluated to the value 4'bx 

Logical Operators:

• &&, || and !.
• Expressions connected by && and || are evaluated from left to right
• The result for these operators is 0 (when false), 1 (when true), and unknown (x - when ambiguous). 
• The negation operator (!) turns a nonzero or true value of the operand into 0, zero or false value into 1, and ambiguous value of operator results in x (unknown value).
• The result is a scalar value:
• 0 if the relation is false
• 1 if the relation is true
• x if any of the operands has x (unknown) bits

Example :

reg [3:0] a, b;
a = 4'b1100;
b = 4'b0000;
!a // 0 - false
!b // 1 - true
a && b // 0 - false
a || b // 1 - true

Relational Operators:

• <, >, <=, >=
• Output should be a scalar value and it should be
• 1, if the expression is true
• 0, if the expression is true
• x, if there are any unknown or z bits in the operands

Example:

 1'b1 && 1'b1 = 1
 1'b1 && 1'b0 = 0
 1'b1 && 1'bx = x
 1'b1 || 1'b0 = 1
 1'b0 || 1'b0 = 0
 1'b0 || 1'bx = x
 ! 1'b1       = 0
 ! 1'b0       = 1

Equality Operators:

• logical equality (==), logical inequality (!=), case equality (===), and case inequality (!==) 
• equality operators return logical value 1 if true, 0 if false.
• If the operands are of different length then fill msb bit's with 0.
• The logical equality operators (==, !=) will yield an x if either operand has x or z in its bits.
• The case equality operators ( ===, !== ) compare both operands bit by bit and compare all bits, including x and z. 
• The result is 1 if the operands match exactly, including x and z bits. 
• The result is 0 if the operands do not match exactly. 
• Case equality operators never result in an x. 

Example:

  4'bx001 ===  4'bx001 = 1
  4'bx0x1 !=  4'bx001 = x
  4'bz0x1 ===  4'bz0x1 = 1
  4'bz0x1 ==  4'bz001 = x
  4'bx0x1 !==  4'bx001 = 1
  4'bz0x1 !==  4'bz001 = 1
  5       ==   10      = 0
  5       ==   5       = 1
  5       !=   5       = 0
  5       !=   6       = 1

Bit-wise Operators:

• ~, &, |, ^, xnor (^~, ~^)
• z is treated as an x in a bitwise operation
• Truth tables for bit-wise operators are shown below

Example:

  ~4'b0001           = 1110
  ~4'bx001           = x110
  ~4'bz001           = x110
  4'b0001 &  4'b1001 = 0001
  4'b1001 &  4'bx001 = x001
  4'b1001 &  4'bz001 = x001
  4'b0001 |  4'b1001 = 1001
  4'b0001 |  4'bx001 = x001
  4'b0001 |  4'bz001 = x001
  4'b0001 ^  4'b1001 = 1000
  4'b0001 ^  4'bx001 = x000
  4'b0001 ^  4'bz001 = x000
  4'b0001 ~^ 4'b1001 = 0111
  4'b0001 ~^ 4'bx001 = x111
  4'b0001 ~^ 4'bz001 = x111

Reduction Operators:

•  and (&), nand (~&), or (|), nor (~|), xor (^), and xnor (~^, ^~)
• Reduction operators take only one operand
• Reduction operators perform a bitwise operation on a single vector operand and yield a 1-bit result
• Reduction operators work bit by bit from right to left. 
• Reduction nand, reduction nor, and reduction xnor are computed by inverting the result of the reduction and, reduction or, and reduction xor, respectively. 

Example:

a = 4'b0101 then

&a = 1'b0

(~& )a =  1'b1

|a = 1'b1

(~|) a = 1'b0

^a = 1'b0

(~^)a = 1'b1

Shift Operators:

•  right shift ( >>), left shift (<<), arithmetic right shift (>>>), and arithmetic left shift (<<<).
• During  right shift, left shift and arithmetic left shift when the bits are shifted then the vacant bit positions are filled with zeros.
• During arithmetic right shift the vacant bit positions are filled with zeros.

Example:

A = 4'b1010;

B = A >> 1;//4'b0101

B = A << 1;//4'b0100

Concatenation Operator:

• The concatenation operator ( {, } ) appends multiple operands.
• The operands must be sized. Unsized operands are not allowed because the size of each operand must be known for computation of the size of the result.
• Concatenations are expressed as operands within braces, with commas separating the operands. 
• Operands can be scalar nets or registers, vector nets or registers, bit-select, part-select, or sized constants. 

Example:

p = 1'b1, q = 2'b00, s = 2'b10, t = 3'b110

u = {q , r} // 4'b0010

u = {p , q , r , s , 3'b001} // 11'b10010110001

u = {p , q[0], r[1]} // 3'b101 

Replication Operator:

• Repetitive concatenation of the same number can be expressed by using a replication constant. 
• A replication constant specifies how many times to replicate the number inside the brackets ( { } )

Example:

reg A;

reg [1:0] B, C;

reg [2:0] D;

A = 1'b1; B = 2'b00; C = 2'b10; D = 3'b110;

Y = { 4{A} } // Result Y is 4'b1111

Y = { 4{A} , 2{B} } // Result Y is 8'b11110000

Y = { 4{A} , 2{B} , C } // Result Y is 8'b1111000010 

Conditional Operator:

The conditional operator(?:) takes three operands.

Syntax: condition_expr ? true_expr : false_expr ;

The condition expression (condition_expr) is first evaluated. If the result is true (logical 1), then the true_expr is evaluated. If the result is false (logical 0), then the false_expr is evaluated. If the result is x (ambiguous), then both true_expr and false_expr are evaluated and their results are compared, bit by bit, to return for each bit position an x if the bits are different and the value of the bits if they are the same. 

Operator Precedence: